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? semiconductor components industries, llc, 2008 october, 2008 ? rev. 4 1 publication order number: NCV7321/d NCV7321 stand alone lin transceiver description the NCV7321 is a fully featured local interconnect network (lin) transceiver designed to interface between a lin protocol controller and the physical bus. the transceiver is implemented in i3t technology enabling both high ? voltage analog circuitry and digital functionality to co ? exist on the same chip. the NCV7321 lin device is a member of the in ? vehicle networking (ivn) transceiver family. it is designed to work in harsh automotive environment and is submitted to the ts16949 qualification flow. the lin bus is designed to communicate low rate data from control devices such as door locks, mirrors, car seats, and sunroofs at the lowest possible cost. the bus is designed to eliminate as much wiring as possible and is implemented using a single wire in each node. each node has a slave mcu ? state machine that recognizes and translates the instructions specific to that function. the main attraction of the lin bus is that all the functions are not time critical and usually relate to passenger comfort. features ? general ? soic ? 8 green package (pb ? free) ? lin ? bus t ransceiver ? lin compliant to specification revision 2.0 and 2.1 (backwards compatible to version 1.3) and j2602 ? bus voltage 45 v ? transmission rate 1 kbps to 20 kbps ? protection ? thermal shutdown ? indefinite short ? circuit protection on pins lin and wake towards supply and ground ? load dump protection (45 v) ? bus pins protected against transients in an automotive environment ? emi compatibility ? integrated slope control ? modes ? normal mode: lin transceiver enabled, communication via the lin bus is possible, inh switch is on ? sleep mode: lin transceiver disabled, the consumption from v bb is minimized, inh switch is off ? standby mode: transition mode reached either after power ? up or after a wakeup event, inh switch is on ? wake ? up bringing the component from sleep mode into standby mode is possible either by lin command, a digital signal on wake pin (e.g. external switch) or directly via en pin. http://onsemi.com pin assignment (top view) 5 6 7 8 1 2 3 4 rxd txd inh en lin NCV7321 pc20040918.3 see detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. ordering information wake v bb gni
NCV7321 http://onsemi.com 2 key technical characteristics and operating ranges table 1. technical characteristics symbol parameter min typ max unit v bb nominal battery operating voltage (note 1) 5 12 27 v load dump protection (note 2 ) 45 i bb _slp supply current in sleep mode 20 a v wake operating dc voltage on wake pin 0 v bb v maximum rating voltage on wake pin ? 45 45 v v inh operating dc voltage on inh pin 0 v bb v v_dig_io operating dc voltage on digital io pins (en, rxd, txd) 0 5.5 v t j junction thermal shutdown temperature 165 c t amb operating ambient temperature ? 40 +125 c v esd electrostatic discharge voltage (lin, wake, v bb ) system human body model (note 3) ? 5 +5 kv electrostatic discharge voltage (all pins) human body model (note 4) ? 4 +4 1. below 5 v on v bb in normal mode, the bus will either stay recessive or comply with the voltage level specifications and transition time specifications as required by sae j2602. it is ensured by the battery monitoring circuit (see par. 7.2.3). 2. the applied transients shall be in accordance with iso 7637 part 1, test pulse 5. the device complies with functional class c ; class a can be reached depending on the application and external components. 3. equivalent to discharging a 150 pf capacitor through a 330 resistor conform to iec standard 1000 ? 4 ? 2. additional external protection components might be needed to reach the specified system esd levels depending on the application. wake pin is stressed through a 33 k resistor. 4. equivalent to discharging a 100 pf capacitor through a 1.5k resistor conform to mil std 883 method 3015.7. block diagram lin NCV7321 gnd rxd vbb inh thermal shutdown txd comp slope control filter en por state & wake ? up control wake pd20070503.2 time ? out vee osc figure 1. block diagram + ?
NCV7321 http://onsemi.com 3 typical application NCV7321 gnd 8 3 6 1 2 4 5 7 vbb inh lin wake rxd txd en microcontroller gnd vcc bat 3.3/5v vbat lin wake gnd kl30 lin ? bus kl31 ecu pd20070503.1 figure 2. typical application diagram for a master node table 2. pin description pin name description 1 rxd receive data output; low in dominant state; open ? drain output 2 en enable input, transceiver in normal operation mode when high, pulldown resistor to gnd 3 wake high voltage digital input pin to apply local wakeup, sensitive to falling edge, pullup current source to v bb 4 txd transmit data input, low for dominant state, pulldown to gnd (switchable strength for wakeup source recognition) 5 gnd ground 6 lin lin bus output/input 7 v bb battery supply input 8 inh inhibit output, switch between inh and v bb can be used to control external regulator or pullup resistor on lin bus table 3. absolute maximum ratings symbol parameter min max unit v bb battery voltage on pin v bb (note 5) ? 0.3 +45 v v lin lin bus voltage (note 6) ? 45 +45 v v inh dc voltage on inhibit pin ? 0.3 v bb + 0.3 v v wake dc voltage on wake pin ? 35 45 v v_dig_io dc input voltage on pins txd, rxd, and en ? 0.3 7 v t j maximum junction temperature ? 40 +150 c v esd electrostatic discharge voltage (pins lin, wake and v bb ) system human body model (note 7) ? 5 +5 kv electrostatic discharge voltage (all pins) human body model (note 8) ? 4 +4 kv electrostatic discharge voltage; charge device model (note 9) ? 500 +500 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 5. the applied transients shall be in accordance with iso 7637 part 1, test pulses 1, 2, 3a, 3b, and 5. the device complies with functional class c; class a can be reached depending on the application and external components. 6. the applied transients shall be in accordance with iso 7637 part 1, test pulses 1, 2, 3a, and 3b. the device complies with fu nctional class c; class a can be reached depending on the application and external components. 7. equivalent to discharging a 150 pf capacitor through a 330 resistor conform to iec standard 1000 ? 4 ? 2. additional external protection components might be needed to reach the specified system esd levels depending on the application. wake pin is stressed through a 33 k resistor. 8. equivalent to discharging a 100 pf capacitor through a 1.5k resistor conform to mil std 883 method 3015.7. 9. conform to eos/esd ? ds5.3 (socketed mode).
NCV7321 http://onsemi.com 4 functional description overall functional description lin is a serial communication protocol that efficiently supports the control of mechatronic nodes in distributed automotive applications. the domain is class ? a multiplex buses with a single master node and a set of slave nodes. the NCV7321 contains the lin transmitter, lin receiver, power ? on ? reset (por) circuits and thermal shutdown (tsd). the lin transmitter is optimized for the maximum specified transmission speed of 20 kb with emc performance due to reduced slew rate of the lin output. the junction temperature is monitored via a thermal shutdown circuit that switches the lin transmitter off when temperature exceeds the tsd trigger level. the NCV7321 has four operating states (unpowered mode, standby mode, normal mode and sleep mode) that are determined by the supply voltage v bb , input signals en and wake and activity on the lin bus. operating states pd20080606.2 sleep mode normal mode standby mode unpowered figure 3. state diagram vbb above reset level lin wake ? up or local wake ? up en = high for t > t_enable en = high for t > t_enable en = low for t > t_disable ? lin transceiver: off ? lin term: 30 k ? inh pin = high ? rxd: low after a wake ? up/ floating otherwise ? txd: wake ? up source flag ? lin transceiver: off ? lin term: floating ? inh pin: floating ? rxd: floating ? txd: weak pulldown (vbb below reset level) ? lin transceiver: off ? lin term: current source ? inh pin: floating ? rxd: floating ? txd: weak pulldown ? lin transceiver: on ? lin term: 30 k ? inh pin: high ? rxd: received lin data ? txd: weak pulldown transmitter input unpowered mode as long as v bb remains below its power ? on ? reset level, the chip is kept in a safe unpowered state. lin transmitter is inactive, both lin and inh pins are left floating and only a weak pulldown is connected on pin txd. pin rxd remains floating. the unpowered state will be entered from any other state when v bb falls below its power ? on ? reset level. standby mode standby mode is a low ? power mode, where lin transceiver remains inactive while inh pin is driven high to activate an external voltage regulator ? see figure 2. depending on the transition which led to the standby mode, pins rxd and txd are configured differently during this mode. a 30 k resistor in series with a reverse ? protection diode is internally connected between lin and v bb pins. standby mode is entered in one of the following ways: ? after the voltage level at v bb pin rises above its power ? on ? reset level. in this case, rxd pin remains high ? impedant and the pulldown applied on pin txd remains weak. ? after a wakeup event is recognized while the chip was in the sleep mode. pin rxd is pulled low while pin txd signals the type of wakeup leading to the standby mode ? its pullup remains weak for lin wakeup and it is switched to strong pulldown for the case of local wakeup (i.e. wakeup via pin wake). while in the standby mode, the configuration of pins rxd and txd remains unchanged, regardless the activity on wake and lin pins ? i.e. if additional wakeups occur during the standby mode, they have no influence on the chip configuration. normal mode in normal mode, the full functionality of the lin transceiver is available. data according the state of txd input are sent to the lin bus while pin rxd reflects the logical symbol received on the lin bus ? high ? impedant for recessive and low for dominant. a 30 k resistor in series
NCV7321 http://onsemi.com 5 with a reverse ? protection diode is internally connected between lin and v bb pins. to avoid that, due to a failure of the application (e.g. software error), the lin bus is permanently driven dominant and thus blocking all subsequent communication, signal on pin txd passes through a timer, which releases the bus in case txd remains low for longer than t_txd_timeout. the transmission can continue once the txd returns to high logical level. in case the junction temperature increases above the thermal shutdown threshold, e.g. due to a short of the lin wiring to the battery, the transmitter is disabled and releases lin bus to recessive. once the junction temperature decreases back below the thermal shutdown release level, the transmission can be enabled again ? however, to avoid thermal oscillations, first a high logical level on txd must be encountered before the transmitter is enabled. as required by sae j2602, the transceiver must behave safely below its operating range ? it shall either continue to transmit correctly (according its specification) or remain silent (transmit a recessive state regardless the of the txd signal). a battery monitoring circuit in NCV7321 de ? activates the transmitter in the normal mode if the v bb level drops below monl_v bb . transmission is enabled again when v bb reaches monh_v bb . the internal logic remains in the normal mode and the reception from the lin line is still possible even if the battery monitor disables the transmission. although the specifications of the monitoring and power ? on ? reset levels are overlapping, it?s ensured by the implementation that the monitoring level never falls below the power ? on ? reset level. normal mode can be entered from either standby or sleep mode when en pin is high for longer than t_enable. when the transition is made from standby mode, txd pulldown is set to weak and rxd is put high ? impedant immediately after en becomes high (before the expiration of t_enable filtering time). this excludes signal conflicts between the standby mode pin settings and the signals required to control the chip in the normal mode (e.g. strong pull ? down on txd after local wakeup vs. high logical level on txd required to send a recessive symbol on lin). sleep mode sleep mode provides extremely low current consumption. the lin transceiver is inactive and the battery consumption is minimized. pin inh is put to high ? impedant state to disable the external regulator and, in case of a master node, the lin termination ? see figure 2. only a weak pullup current source is internally connected between lin and v bb pins, in order to minimize current consumption even in case of lin short to gnd. sleep mode can be entered from normal mode by assigning low logical level to pin en for longer than t_disable. the sleepmode can be entered even if a permanent short occurs either on lin or wake pin. if a wakeup event occurs during the transition between normal and sleep mode (during the t_disable filtering time), it will be regarded as valid wakeup and the chip will enter standby mode with the appropriate setting of pins rxd and txd. wake ? up two types of wakeup events are recognized by NCV7321: ? local wakeup ? when a high ? to ? low transition on pin wake is encountered and wake pin remains low at least during t_wake ? see figure 5. ? different threshold parameters apply compared to the receiver in the normal mode (see parameters vrec_rec_slp and vrec_hys_slp) wakeup events can be exclusively detected in sleep mode or during the transition from normal mode to sleep mode. due to timing tolerances, valid wakeup events beginning shortly before normal ? to ? sleep mode transition can be also sometimes regarded as valid wakeups. wake t v bb local wakeup recognized sleep mode stand ? by mode v_wake_th t_wake pd20070503.4 figure 4. local wakeup detection
NCV7321 http://onsemi.com 6 lin recessive level lin t t_lin_wake 40% vbb detection of remote wake ? up v bb 60% vbb sleep mode stand ? by mode lin dominant level pd20070504.2 t_enable figure 5. remote (lin) wakeup detection electrical characteristics definitions all voltages are referenced to gnd (pin 5). positive currents flow into the ic. table 4. dc characteristics (v bb = 5 v to 27 v; t j = ? 40 c to +150 c; unless otherwise specified. typical values are given at v(v bb ) = 12 v and t j = 25 c, unless specified otherwise.) dc characteristics ? supply symbol parameter conditions min typ max unit v bb i bb _on_rec v bb consumption normal mode; lin recessive v lin = v(v bb ) = v inh = v wake 1.6 ma i bb _on_dom v bb consumption normal mode; lin dominant v(v bb ) = v inh = v wake 8 ma i bb _stb v bb consumption standby mode v lin = v(v bb ) = v inh = v wake 350 a i bb _slp v bb consumption sleep mode v lin = v(v bb ) = v inh = v wake 30 a i bb _slp_18v v bb consumption sleep mode, v bb < 18 v v lin = v(v bb ) = v inh = v wake 20 a i bb _slp_12v v bb consumption sleep mode, v bb = 12 v, t j < 85 c v lin = v(v bb ) = v inh = v wake 10 a lin transmitter vlin_dom_losu p lin dominant output voltage txd = low; v bb = 7.3 v 1.2 v vlin_dom_hisup lin dominant output voltage txd = low; v bb = 18 v 2.0 v vlin_rec lin recessive output voltage txd = highh; i lin = 0 ma v bb ? v (note 10) v ilin_lim short circuit current limitation v lin = v bb _max 40 200 ma r slave internal pullup resistance 20 33 47 k ilin_off_dom lin output current, bus in dominant state normal mode, driver off; v bb = 12 v ? 1 ma ilin_off_dom_slp lin output current, bus in dominant state sleep mode, driver off; v bb = 12 v ? 20 ? 15 ? 2 a 10. v is the forward diode voltage. typically (over the complete temperature) v = 1 v.
NCV7321 http://onsemi.com 7 table 4. dc characteristics (v bb = 5 v to 27 v; t j = ? 40 c to +150 c; unless otherwise specified. typical values are given at v(v bb ) = 12 v and t j = 25 c, unless specified otherwise.) dc characteristics ? supply symbol unit max typ min conditions parameter lin transmitter ilin_off_rec lin output current, bus in recessive state driver off; v bb = 12 v 5 a ilin_no_gnd communication not affected v bb = gnd = 12 v; 0 < v lin < 18 v ? 1 1 ma ilin_no_v bb lin bus remains operational v bb = gnd = 0 v; 0 < v lin < 18 v 100 a lin receiver vrec_dom receiver threshold lin bus recessive ? dominant 0.4 0.5 v bb vrec_rec receiver threshold lin bus dominant ? recessive 0.5 0.6 v bb vrec_cnt receiver centre voltage (vbus_dom + vbus_rec)/2 0.475 0.525 v bb vrec_hys receiver hysteresis (vbus_rec ? vbus_dom) 0.05 0.175 v bb dc characteristics ? i/os symbol parameter conditions min typ max unit pin en vil_en low level input voltage ? 0.3 0.8 v vih_en high level input voltage 2.0 5.5 v rpd_en pulldown resistance to ground (note 10) 150 350 650 k pin inh delta_vh high level voltage drop i inh = 15 ma, inh active 0.1 0.35 0.75 v i_leak leakage current sleep mode; v inh = 0 v ? 1 0 1 a pin rxd iol_rxd low level output current v rxd = 0.4 v, normal mode, v lin = 0 v 1.5 ma ioh_rxd high level output current v rxd = 5 v, normal mode, v lin = v(v bb ) ? 5 0 5 a pins txd vil_txd low level input voltage ? 0.3 0.8 v vih_txd high level input voltage 2.0 5.5 v rpd_txd pulldown resistor on txd pin, corresponding to ?weak pulldown? normal mode or sleep mode or standby mode after powerup or standby mode after lin wakeup 150 350 650 k ipd_rxd_strong pulldown current on txd pin corresponding to ?strong pulldown? standby mode after local wakeup 1.5 ma 10. v is the forward diode voltage. typically (over the complete temperature) v = 1 v.
NCV7321 http://onsemi.com 8 table 4. dc characteristics (v bb = 5 v to 27 v; t j = ? 40 c to +150 c; unless otherwise specified. typical values are given at v(v bb ) = 12 v and t j = 25 c, unless specified otherwise.) dc characteristics ? i/os symbol unit max typ min conditions parameter pin wake v_wake_th wake threshold voltage v bb ? 3.3 v bb ? 1.1 v i_wake_pullup pullup current on pin wake v wake = 0 v ? 30 ? 15 ? 1 a i_wake_leak leakage of pin wake v wake = v(v bb ) ? 5 0 5 a dc characteristics ? power ? on ? reset, battery monitoring and thermal shutdown symbol parameter conditions min. typ. max. unit por and v bb monitor porh_v bb power ? on reset high level on v bb v bb rising 2 4.5 v porl_v bb power ? on reset low level on v bb v bb falling 1.7 4 v monh_v bb battery monitoring high level v bb rising 4.5 monl_v bb battery monitoring low level v bb falling 3 tsd t j junction temperature temperature rising 165 c t j _hyst thermal shutdown hysteresis 9 18 c 10. v is the forward diode voltage. typically (over the complete temperature) v = 1 v.
NCV7321 http://onsemi.com 9 table 5. ac characteristics v bb = 5 v to 27 v; t j = ? 40 c to +150 c; unless otherwise specified. for the transmitter parameters, the following bus loads are considered: l1 = 1 k / 1 nf; l2 = 660 / 6.8 nf; l3 = 500 / 10 nf symbol parameter conditions min typ max unit lin transmitter d1 duty cycle 1 = t bus_rec(min ) / (2 x t bit ) th rec(min) = 0.744 x v bb th dom(min) = 0.581 x v bb t bit = 50 s v(v bb ) = 7 v to 18 v 0.396 0.5 d2 duty cycle 2 = t bus_rec(max ) / (2 x t bit ) th rec(max) = 0.422 x v bb th dom(max) = 0.284 x v bb t bit = 50 s v(v bb ) = 7.6 v to 18 v 0.5 0.581 d3 duty cycle 3 = t bus_rec(min ) / (2 x t bit ) th rec(min) = 0.788 x v bb th dom(min) = 0.616 x v bb t bit = 96 s v(v bb ) = 7 v to 18 v 0.417 0.5 d4 duty cycle 4 = t bus_rec(max ) / (2 x t bit ) th rec(max) = 0.389 x v bb th dom(max) = 0.251 x v bb t bit = 96 s v(v bb ) = 7.6 v to 18 v 0.5 0.590 t_fall lin falling edge normal mode; v bb = 12 v 22.5 s t_rise lin rising edge normal mode; v bb = 12 v 22.5 s t_sym lin slope symmetry normal mode; v bb = 12 v ? 4 0 4 s lin receiver trec_prop_down propagation delay of receiver falling edge 0.1 6 s trec_prop_up propagation delay of receiver rising edge 0.1 6 s trec_sym propagation delay symmetry trec_prop_down ? trec_prop_up ? 2 2 s mode transitions timeouts t_lin_wake duration of lin dominant for detection of wake ? up via lin bus sleep mode 30 90 150 s t_wake duration of low level on wake pin for local wakeup detection sleep mode 7 50 s t_enable duration of high level on en pin for transition to normal mode 2 5 10 s t_disable duration of low level on en pin for transition to sleep mode 2 5 10 s t_txd_timeout txd dominant time ? out normal mode, txd = low, guarantees baudrate as low as 1 kbps 15 50 ms
NCV7321 http://onsemi.com 10 t bus_dom(min) lin t th rec(max) th rec(min) th dom(max) th dom(min) t bus_dom(max) t bus_rec(max) t bus_rec(min) t bit t bit 50% thresholds of receiving node 1 thresholds of receiving node 2 txd t pc20080606.3 figure 6. lin transmitter duty cycle t_fall t_rise lin t 60% 40% 60% 40% pc20060428.1 100% 0% figure 7. lin transmitter rising and falling times 50% t rec_prop_up rxd t lin t vbb pc20060428.3 60% vbb 40% vbb t rec_prop_down figure 8. lin receiver timing
NCV7321 http://onsemi.com 11 device ordering information part number temperature range package type shipping ? NCV7321d10g ? 40 c ? 125 c soic ? 8 (pb ? free) 96 tube / tray NCV7321d10r2g ? 40 c ? 125 c soic ? 8 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCV7321 http://onsemi.com 12 package dimensions soic 14 case 751ap ? 01 issue a date 29 aug 2008
NCV7321 http://onsemi.com 13 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NCV7321/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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